
AMS Layout Engineer with 5 years of experience delivering high-performance, mixed-signal IC layouts for high-speed receivers, transceivers. Seeking to leverage deep layout expertise in a collaborative team to deliver reliable, first-pass silicon
Synopsys ICV
Calibre PERC
DRC
LVS
ERC
EMIR analysis
Antenna rule checking
Topology verification
Layout versus schematic
Layout versus layout
Mixed-signal layout
High-speed receiver layout
Transceiver layout
Driver layout
GDS review