Analog IC engineer has interests in analog electronics design and layout, seeking to gain industrial experience and knowledge in well-known electronics company by being a member of a talented and experienced team.
Overview
4
4
years of professional experience
1
1
Language
Work History
AMS Layout Engineer
Si-Vision (Contractor to Synopsys)
11.2021 - Current
Working on Different projects for LP5X, DDR5, LPDDR5, DDR5A, lpddr4 families
Working on different advanced Tech Nodes (N3, N5, N6, N7, N14, N16, SS2, SS4, SS5, SS14)
Working on High Speed Receivers (Sampler, Foldamp, etc.) and Transceiver part, especially PU/PD Drivers
Running DRC, LVS, ERC, and ANT using Synopsis ICV
Running Calibre PERC (TOPO (vs Schematic & vs Layout), LDL, P2P, and CD), running ICV perc (LDL) and solving LDL issues.
Running and Solving EMIR Violations for different blocks.
Running DRC & LVS for abutment, and solving resulted violations.
Working on Covercell for different families
Reviewing Different GDSs for customers.
Education
Bachelor of Engineering - Nanotechnology And Nano-electronics Engineering
University of Science And Technology At Zewail City
Giza, Egypt
07.2021
Master of Science - IC Design
Cairo University
Cairo
04.2001 -
Skills
Experienced with Synopsys Custom Compiler tools
Good Knowledge of Cadence (GP Work, Uni Projects)
Experienced in layout techniques
Excellent documentation skills
WORK-MILITARY RELATED INFO
Military Status: Completely exempted from military service
Timeline
AMS Layout Engineer
Si-Vision (Contractor to Synopsys)
11.2021 - Current
Master of Science - IC Design
Cairo University
04.2001 -
Bachelor of Engineering - Nanotechnology And Nano-electronics Engineering
University of Science And Technology At Zewail City